Today's computer systems are ever evolving. Current systems can include one or more processors. These processors can be in separate processor packages or can be multiple cores in a single processor package. Furthermore, as time goes on, today's dual and quad core packages are likely to be extended to many-core processor packages including 8, 16 or even greater numbers of cores. Increased amount of cores present in a processor package can complicate various communications within a system.
For example, in many-core processor designs, where “many” is a large number, cache coherence protocols may cost dozens or hundreds of cycles in a miss or a location of contention. This overhead is not avoidable by the programmer, even when the programmer knows a priori the data access patterns of the application, and could theoretically remove extraneous coherence messages.